Abolfazl Sajadi CV – Curriculum Vitae

About Me

Hello! I’m Abolfazl Sajadi (Abish).

A Ph.D. researcher at the Leiden Institute of Advanced Computer Science (LIACS) at Leiden University. Born on October 3, 1993, in Arak, Iran, I've been passionate about electronics and digital systems since my early teens.

I earned my Master's degree in Electrical Engineering – Digital Electronic Systems from the University of Tehran in 2021, graduating as the top student in my class. My master's thesis focused on developing a machine learning-resistant PUF-based authentication protocol for resource-constrained IoT devices.

Currently, under the supervision of Prof. Nele Mentens, Todor Stefanov, and Nusa Zidaric. I am working on the PROACT project, which involves the digital hardware design of lightweight cryptographic circuits. My research interests have evolved to include ASIC design, where I am focusing on pre-silicon side-channel leakage analysis to enhance hardware security. Additionally, I am exploring HW/SW co-design, especially with FPGA platforms, to optimize system performance and efficiency.

Research Interests

ASIC Design
Hardware Implementation of Cryptographic Primitives
Hardware Security (offensive and defensive approaches)
System-Level HW/SW Co-Design, particularly with FPGAs
Lightweight Authentication using Physical Unclonable Functions (PUFs)
Hardware Implementation of Machine Learning Algorithms

I believe that neural networks will become a perfect solution to many of our future challenges. My enthusiasm for ASIC design and hardware security drives me to explore innovative solutions in the field of digital electronics.

Age: 30
Residence: Netherlands
Language: Persian, English
Address: BM_3_12, Gorlaeus Building Einsteinweg 55 | 2333 CC Leiden

My Skills

Hardware Security & ASIC Design

Expertise in developing secure, fault-tolerant hardware, with a focus on ASIC design, side-channel leakage analysis, and testable digital systems. Skilled in designing cryptographic circuits that are resilient to physical attacks and optimizing them for energy and resource efficiency.

Programming Skills

Proficient in programming languages essential for hardware and software co-design, including Python, C, C++, VHDL, Verilog, and Assembly. Extensive experience in low-level hardware description and simulation for both FPGA and ASIC design flows.

Neural Networks & Machine Learning

Expertise in the development of neural networks using libraries like TensorFlow, Keras, and PyTorch. Focused on hardware-accelerated machine learning implementations, with experience in applying AI to hardware security problems and optimizing deep learning models for hardware.

FPGA & HW/SW Co-Design

Specialized in HW/SW co-design for FPGA-based systems, leveraging platforms like Zynq®-7000 SoC. Ability to implement parallel processing, hardware acceleration, and integration of machine learning models in real-time systems using both hardware and software solutions.

Abilities

Problem Solving

Teamwork & Collaboration

Hardworking

Strong Technical Foundation

M.Sc. thesis

thesis

Home meter monitoring Device

Project

Associate’s thesis

thesis

Bachelor’s thesis

thesis